OpenMaze.org

Seeed design rules

You can set these in the Settings -> “Design Technology” in DesignSpark, and then it will check them for you when you run the Design Rule Check. It’s easiest to set all the technologies correctly at the beginning so you don’t have to change them later.

* 6 mil minimum trace width

* 6 mil spacing between traces, vias, etc. (8 mil for 4-layer)

* 7 mils between pads and silkscreen

* 15.76mil between circuit and edge of PCB

* Drilling holes: 11.81-250mils, or 0.3-6.35mm. Tolerance is +/-0.08mm or 3.148mil. A typical header pin is 0.6mm, so use at least 0.8mm/32mil for a standard hole

* Annular ring: >=6 mils

* Silkscreen: 6 mil thickness, 40 mil size

 

Preparing to export manufacturing plots

* Select the layers that Seeed needs. Go to “Output” > “Manufacturing Plots”, and tick the checkbox by every layer except “Top Documentation”, “Top Copper (Paste)”, and “Bottom Copper (Paste)”. (clay122415: “Documentation”? NO “Top Doc”, “Top Paste”, “Bottom Paste Mask”- actually I unchecked both “Documentation” and “Top Doc” because I don’t think I have anything on either layer)

* Put unplated board outline on every layer. In the same dialog box, for each layer, go to the “Settings” tab, and make sure “Unplated Board Outlines” is checked and “Plated Board Outlines” is unchecked.

* Removed all “unplated holes” from the output. Go to “Drill Data” and “Drill Ident Drawing” layers, “Settings” tab, and uncheck “Unplated Holes”. Then click “Options” in the bottom right corner, then “NC Drill” button, then uncheck “Separate Files for Plated and Unplated Holes”.

 

You may have to repeat the above steps after restarting the software.

 

Once that is done, click “Run” in the “Manufacturing Plots” dialog and it will generate a separate file for every layer in the directory where your PCB file is.

 

Renaming output files

Now, you have to rename each of the output files according to Seeed’s specifications. Each file should be PCBNAME.XXX, where PCBNAME is the name of your design and XXX is the appropriate extension (see below).

* Top Copper = GTL (clay122415: “Top”)

* Top Solder Mask = GTS

* Top Silkscreen = GTO

* Bottom Copper = GBL (clay122415: “Bottom”)
* Bottom Solder Mask = GBS

* Bottom Silkscreen = GBO (clay122415: usually not present)

I’m not quite sure how to handle the drill files. I usually leave the one that has a DRL extension as-is, and rename the other one to end in *.txt.

 

Uploading

Zip together all of the files, except for the *.PCB, *.MOP, and the PLOT REPORT file. Upload the zip file

http://www.seeedstudio.com/service/index.php?r=pcb

 

There is a link for “Gerber viewer” in the bottom right that should pop open a preview of each layer.